Archinoetics, LLC   .   Honolulu, Hawaii

Archinoetics

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F-PAS

Field Programmable Gate Arrays (FPGAs) have become a common platform for providing specific high-speed processing for Department of Defense applications. The reprogrammable nature and high performance capabilities (versus traditional embedded processors) of this customizable technology make it desirable for real-time processing during prototype development without the long fabrication time required for custom circuitries.

The problem, however, is that the design cycle for a typical FPGA development is very time-consuming and convoluted in nature. These complexities stem from both the various CAD tools required in the multiple steps within the FPGA design flow and the multitude of design options specific to each tool.

The Field-Programmable Automation System (F-PAS) platform encapsulates different sets of tools and intelligently automates each step in the design process in a single, intuitive user interface, streamlining the design process into a single application. This move towards a high-level design entry scheme eliminates the need for multiple steps each requiring a separate application. Furthermore, such a unified application, with an intelligent optimization system that masks the complexities that exist in an FPGA design flow, can be used by a single, non-expert user rather than multiple engineers each in different specialties.

F-PAS
A diagram showing the tradeoff between size and speed, as computed by F-PAS, for an FPGA design.
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